1. Field of the Invention
The present invention relates to a memory element, a memory device utilizing the memory element, a manufacturing method thereof, and a driving method thereof. Further, the present invention relates to a signal processing circuit including the memory element or the memory device. Further, the present invention relates to a semiconductor device including the memory element or the memory device.
Note that a semiconductor device in this specification and the like refers to any device that can function by utilizing semiconductor characteristics, and for example, electro-optical devices, memory devices, signal processing circuits, semiconductor circuits, and electronic devices are all semiconductor devices.
2. Description of the Related Art
In recent years, with the widespread use of electronic devices such as personal computers and mobile phones, demand for higher performance of electronic devices has been increased. In order to achieve higher performance of such electronic devices, higher performance of memories has been particularly required in addition to higher-speed operation of interfaces, improvement in processing performance of external devices, and the like.
The “memory” (memory device) used here includes, in its category, not only a main memory for storing data and program but also a register, a cache memory, and the like used in a signal processing circuit such as a central processing unit (CPU). A register is provided to temporarily hold data for carrying out arithmetic processing, holding a program execution state, or the like. In addition, a cache memory is located between an arithmetic circuit and a main memory in order to reduce access to the low-speed main memory and speed up the arithmetic processing. In a memory device such as a register or a cache memory, writing of data needs to be performed at higher speed than in a main memory. Thus, in general, a flip-flop or the like is used as a register, and a volatile memory circuit such as a static random access memory (SRAM) is used as a cache memory.
In order to reduce consumed power, a method for temporarily stopping the supply of power to a signal processing circuit in a period during which data is not input and output has been suggested. In the method, a nonvolatile memory circuit is located around a volatile memory circuit such as a register or a cache memory, so that the data is temporarily stored in the nonvolatile memory circuit. Thus, in the signal processing circuit, the data signal stored in the register, the cache memory, or the like can be held even while the supply of power is stopped (for example, see Patent Document 1).
In addition, in the case where the supply of power is stopped in a signal processing circuit for a long time, data in a volatile memory circuit may be transferred to an external memory device such as a hard disk or a flash memory before the supply of power is stopped, in which case the data can be prevented from being erased.